The RISC-V ecosystem is maturing rapidly, with an increasing number of software undergoing migration to RISC-V. We developed a tool named RAX to assess the porting complexity of projects migrating to the RISC-V architecture. RAX evaluates complexity by incorporating Cyclomatic Complexity alongside multiple architecture-specific factors, such as the proportion of assembly code instructions and the frequency of inline function usage. The tool classifies the assessment results into three levels: Low, Middle, and High. For example, the simple project is libtool, the medium project is mesa, and the difficult project is gcc.
Your project vLLM is very well-known. Our tool RAX evaluates that the complexity of your project is low. Could you please confirm the assessment accuracy?
More details detected by our tool RAX are shown: the number of lines of architecture-related code are 205. And the cyclic complexity is 44006. If you want to learn more, please don’t hesitate to us. Thank you.
It could be possible that vLLM’s porting complexity to RISC-V is low, as there are indications that RISC-V support is considered “straightforward” if PyTorch is supported, and some users have already run vLLM on RISC-V with minimal changes. However, there is no explicit confirmation or official metric from the vLLM maintainers regarding the exact porting complexity or agreement with RAX’s assessment. The number of architecture-related lines and cyclomatic complexity you provided are not directly referenced in the available documentation or issues, so I can’t fully confirm their accuracy for vLLM specifically.
Though I’m not entirely certain, it might be that your assessment aligns with the current state of vLLM’s codebase, especially since contributors have reported successful experiments on RISC-V and are working on further improvements. Would you like a more detailed breakdown of vLLM’s architecture or porting experiences to RISC-V as discussed by the community?